Employing techniques for lower power consumption is essential for elongating the lifetime of a battery in a PDA (Personal Digital Assistant) or a portable personal computer. In a high end microcomputer, too, the problem of heat generation resulting from power consumption becomes serious in the sense of deteriorating the reliability of the device.
A known technique for reducing the power consumption of a memory circuit is exemplified in the prior art by lowering the supply voltage, as disclosed on pp. 53 and 54 of 1990 Symposium on VLSI Circuit, Digest of Technical Papers (1990), which is hereinafter referred to as prior art(1).
There is another method by which a memory of smaller capacity is placed in a lower hierarchy of an architecture having a multi-hierarchy memory, as disclosed on pp. 16 and 17 of 1994 IEEE Symposium on Low Lower Electronics, Digest of Technical Papers (1994) (Prior Art 2). Generally speaking, a memory of the smaller storage capacity can be constructed to have the lower load resistance and capacity in its bit lines or the like so that it can be operated in the lower power consumption. In this example of the prior art, the power consumption is reduced by enhancing the frequency of accessing the memory of as low hierarchy as possible to have the smaller capacity, i.e., the memory of the lower power consumption.